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DescriptionPrimary Contact(s)Primary ComponentSecondary ComponentStatusDateURLNotes
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riscv sail repoMartin Bergersailhttps://github.com/riscv/sail-riscv
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Nikhil RISC-V Summit (Dec 2019) Sail Tutorial Videopeter sewellsailhttps://www.cl.cam.ac.uk/~pes20/sail/zoom_1.mp4
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Nikhil RISC-V Summit (Dec 2019) Sail Tutorial slidesAllen Baumsailtutorialhttps://github.com/rsnikhil/RISCV_ISA_Spec_Tour
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sail litmus testspeter sewellsaillitmushttps://github.com/litmus-tests/litmus-tests-riscv
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operational concurrency model & risc-v sailpeter sewellsailconcurrencyhttp://www.cl.cam.ac.uk/users/pes20/rmem
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axiomatic concurrency and rsc-v intra-instruction semanticspeter sewellsailconcurrencyhttps://isla-axiomatic.cl.cam.ac.uk/
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axiomatic concurrency model and a more ad hoc and partial instruction semantics, just enough for litmus testpeter sewellhttp://diy.inria.fr/
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ARM operational and axiomatic models for instruction-fetch and icache maintenance modepeter sewellhttps://www.cl.cam.ac.uk/~pes20/iflat/
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prior art bibliographykrsteIPprior arthttps://people.cs.clemson.edu/~mark/hist.html
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riscv-config documentationAllen Baumconfigcompliancehttps://riscv-config.readthedocs.io/en/latest/
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Sail/ISA spec integration pull requestAllen Baumsailspechttps://github.com/rems-project/sail-riscv/pull/43
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Sail/ISA spec integration readme - Allen Baumsailspechttps://github.com/rems-project/riscv-isa-manual/blob/sail/README.SAIL
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draft RISC-V ISA unpriv spec w/ Sail-generated LaTeXAllen Baumsailspechttps://github.com/rems-project/riscv-isa-manual/blob/sail/release/riscv-spec-sail-draft.pdf
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draft RISC-V ISA priv spec w/ Sail-generated LaTeXAllen Baumsailspechttps://github.com/rems-project/riscv-isa-manual/blob/sail/release/riscv-privileged-sail-draft.pdf
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SERV: The world's smallest RISC-V CPUOlof Kindgrenservcpuhttps://diode.zone/videos/watch/0230a518-e207-4cf6-b5e2-69cc09411013
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IBM Fpgen Floating-Point Test GeneratorAllen BaumF-extensioncompliancehttps://www.research.ibm.com/haifa/projects/verification/fpgen/papers/ieee-test-suite-v2.pdf
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IBM Fpgen Floating-Point Test GeneratorAllen BaumF-extensioncompliancehttps://www.research.ibm.com/haifa/projects/verification/fpgen/ieeets.shtml
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IBM Fpgen Floating-Point Test GeneratorAllen BaumF-extensioncompliancehttps://www.research.ibm.com/haifa/projects/verification/fpgen/test_suite_download.shtml
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IBM Fpgen Floating-Point Test GeneratorAllen BaumF-extensioncompliancehttps://researcher.watson.ibm.com/researcher/view_group.php?id=9517
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Berkeley TestFloatAllen BaumF-extensioncompliancehttp://www.jhauser.us/arithmetic/TestFloat.html
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Haskell test using IBM FPGen for vectorsAllen BaumF-extensioncompliancehttps://hackage.haskell.org/package/fptest
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Univ. of Utah tests with many pointersAllen BaumF-extensioncompliancehttp://www.math.utah.edu/~beebe/software/ieee/
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Crypto paper are in hereAllen BaumCryptoAEShttps://drive.google.com/drive/folders/1E-PQdhwynWYW9LqoeKKmXszOtj6eHByK
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Intel Xeon overview 2017 - Skylake, etcAndy Glewintelvirtual memory
https://software.intel.com/content/www/us/en/develop/articles/intel-xeon-processor-scalable-family-technical-overview.html
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RISC-V asciidoc/asciidoctor demo repoBill Traynorasciidocbuildhttps://github.com/riscv/docs-templates
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OpenJDK RISC-V Port (RV64GC)Yadong Wang / Sanhong LiRuntimesJavahttps://github.com/riscv-collab/riscv-openjdk
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